To learn about Q-point, first we will learn about DC load line.
How is DC load line plotted?
The fig. shown below is of a bipolar junction transistor connected in common emitter configuration. Consider the output loop of the transistor and applying Kirchhoffâ€™s voltage law to output circuit.
Vcc â€“ VCE â€“ IcRc=0
NAND and NOR logic gates are also known as universal gates . Any combinational and sequential logic can be implemented using NAND and NOR gates. Even the flip flop circuits are constructed using universal gates.
The equivalent operations of NOT, AND and OR gates using NAND gates are shown below Continue reading
JK flip flop is modified RS flip flop. The inputs R and S are ANDed with Q and Q’ respectively to form the inputs of JK flip flop. Its operation remains same as RS flip flop except when both inputs are 1.The indeterminate state, i.e. when R=1, S=1, is eliminated in JK flip flop and the output toggles or complements its state when J=1, K=1.
(i) No. of inputs and outputs
Number of inputs = 4
Number of outputs = 4
(ii)Assigning letter symbols
Symbols of inputs – A, B, C, D
Symbols of outputs – W, X, Y, Z
De Morgan’s law
The theorem states that the complement of sum of variables is equal to the product of their individual complements.